MSI H6M-P23 (B3) Spécifications

®DB14-000274-05LSISAS1064 PCI-Xto 4-Port Serial AttachedSCSI/SATA ControllerTECHNICALMANUALOctober 2005Version 3.2

x ContentsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.

4-32 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Device Number [7:3]These read only bits indicate

PCI I/O Space and Memory Space Register Description 4-33Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 4.7 defines the PCI M

4-34 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x00System DoorbellRead/WriteThe Syste

PCI I/O Space and Memory Space Register Description 4-35Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Reserved [31:4]This field i

4-36 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Diagnostic Write Enable 7The LSISAS1064 sets thi

PCI I/O Space and Memory Space Register Description 4-37Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x0CTest Base Ad

4-38 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x14Diagnostic Read/Write AddressRead/

PCI I/O Space and Memory Space Register Description 4-39Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Reserved [30:4]This field i

4-40 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Reserved [7:4]This field is reserved.Reply Interr

PCI I/O Space and Memory Space Register Description 4-41Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x44Reply QueueR

Contents xiCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figures1.1 LSISAS1064 Direct-Connect Example Application 1-31.2 LSISAS1

4-42 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller 5-1Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Chapter 5Specifi

5-2 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.For more information concerning the SAS/SATA transceivers, please

DC Characteristics 5-3Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 5.4 GigaBlaze Receiver Voltage Characteristics – RX[3:

5-4 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Vol– 0.1 × VDDIO V Iout= 1500 µAVoh0.9 × VDDIO – V Iout= -500 µAI

DC Characteristics 5-5Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 5.12 Schmitt Trigger Inputs – REFCLK_B, FSELAParameter

5-6 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 5.17 4 mA Outputs – PROCMONParameter Min Max UnitVol– 0.4 V

DC Characteristics 5-7Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 5.21 5 mA Bidirectional Signals – SERIAL_CLK,SERIAL_DA

5-8 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.5.2 AC CharacteristicsThe AC characteristics described in this se

AC Characteristics 5-9Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 5.2 and Table 5.25 provide reset input timing data.Fi

xii ContentsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.

5-10 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.5.3 External Memory Timing DiagramsThis section provides timing

External Memory Timing Diagrams 5-11Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 5.5 Flash ReadFigure 5.6 NV ReadMAMD[31

5-12 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 5.7 NV Write5.4 PinoutTable 5.31 provides the signal list

Pinout 5-13Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 5.31 Listing by Signal NameN/C E8N/C E9N/C E10N/C E15N/C E16N/C E

5-14 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 5.31 Listing by Signal Name (Cont.)VSS2 B14VSS2 B15VSS2 B1

Pinout 5-15Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 5.32 Listing by Pin NumberJ22 REFCLK_NJ23 N/CJ24 PSBRAM_CS/J25 BW

5-16 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table 5.32 Listing by Pin Number (Cont.)AD20 VDDIO33PCIXAD21 VDD

Pinout 5-17Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.(This page left intentionally blank.)

5-18 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 5.8 LSISAS1064 472-Pin BGA Top ViewA2 A3 A4 A5 A6 A7 A8 A

Pinout 5-19Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 5.8 LSISAS1064 472-Pin BGA Top View (Cont.)A14 A15 A16 A17 A18 A

Contents xiiiVersion 3.1 Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Tables2.1 PCI/PCI-X Bus Commands and Encodings 2-102.2 Fl

5-20 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.5.5 Package DrawingsThe LSISAS1064 is packaged in a 472-EPBGA-T

Package Drawings 5-21Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 5.9 472-Pin EPBGA-T (UO) Mechanical Drawing (Sheet 1 o

5-22 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 5.9 472-Pin EPBGA-T (UO) Mechanical Drawing (Sheet 2 of 3

Package Drawings 5-23Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 5.9 472-Pin EPBGA-T (UO) Mechanical Drawing (Sheet 3 o

5-24 SpecificationsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller A-1Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Appendix ARegis

A-2 Register SummaryCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Expansion ROM Base Address 0x30–0x33 Read/Write 4-13Capabiliti

A-3Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.MSI-X Table Offset – Read Only 4-26MSI-X PBA Offset – Read Only 4-27PCI-X Capab

A-4 Register SummaryCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Table A.3 LSISAS1064 PCI Memory [0] Space RegistersRegister Na

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller IX-1Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.IndexNumerics1

xiv ContentsVersion 3.1 Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.5.7 PCI-X Output Signals – REQ/, INTA/, ALT_INTA/ 5-35.8 P

IX-2 IndexCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.enable bus mastering 4-4enable I/O 4-5enable memory space 4-5enable pari

Index IX-3Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.DC characteristics 5-1designed maximum cumulative read size bit 4-30desi

IX-4 IndexCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.II/Obase address 4-5base address register 2-4, 2-9, 4-9key 4-35, 4-36, 4

Index IX-5Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.memory [0] low 4-5, 4-10memory [1] high 4-5, 4-11memory [1] low 4-5, 4-1

IX-6 IndexCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.memory read command 2-12memory read dword 2-10memory read dword command

Index IX-7Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.split completion discarded bit 4-31status register 4-30unexpected split

IX-8 IndexCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.memory [1] low 4-11minimum grant 4-16MSI capability ID 4-20MSI mask bits

Index IX-9Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.ACTIVE_LED[3:0]/ 3-10AD[63:0] 3-4ADSC/ 3-8ADV/ 3-8ALT_GNT/ 3-6ALT_INTA/

IX-10 IndexCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.PCI arbitration 3-5PCI error reporting 3-5PCI interrupt 3-6PCI-related

Index IX-11Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.VVDD_IO 5-2VDD2 3-12VDDC 5-2VDDIO33 3-12VDDIO33PCIX 3-12VDDIO5PCIX 3-12

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller 1-1Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Chapter 1Introd

IX-12 IndexCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA ControllerCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Customer FeedbackWe

Customer FeedbackCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Reader’s CommentsFax your comments to: LSI Logic CorporationTechn

1-2 IntroductionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.version 1.0a. SATA II is an extension to SATA 1.0a. LSI Logic SAS/

General Description 1-3Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 1.1 LSISAS1064 Direct-Connect Example ApplicationFig

1-4 IntroductionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.The LSISAS1064 is based on the Fusion-MPT (Message PassingTechnolo

Benefits of the Fusion-MPT Architecture 1-5Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.advantages of SATA, SCSI, and FC, and is

iiCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.This document contains proprietary information of LSI Logic Corporation. Theinfo

1-6 IntroductionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.The Fusion-MPT architecture improves overall system performance by

Benefits of GigaBlaze®Transceivers 1-7Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.transaction information with all PCI-X transa

1-8 IntroductionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• Provides 4 fully independent phys• Each phy supports 3.0 Gbits/s

Summary of LSISAS1064 Features 1-9Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.– Supports 32-bit or 64-bit addressing through D

1-10 IntroductionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• Provides a full 32-bit or 64-bit PCI-X DMA bus master• Reduces

Summary of LSISAS1064 Features 1-11Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• Isolates the power and ground of I/O pads and

1-12 IntroductionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller 2-1Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Chapter 2Functi

2-2 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.1 Block Diagram DescriptionThe LSISAS1064 consists of

Block Diagram Description 2-3Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 2.1 LSISAS1064 Controller Block Diagram2.1.1 H

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller iiiCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.PrefaceThis boo

2-4 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.1.1.1 PCI/PCI-X InterfaceThe LSISAS1064 provides a PCI

Block Diagram Description 2-5Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.1.1.4 PCI Timer and ConfigurationThis PCI Timer and

2-6 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.two-wire serial interface chip. The I2C block controls a

Fusion-MPT Architecture Overview 2-7Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.1.2.5 SAS Link and PhyThe LSISAS1064 uses th

2-8 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.queue consists of the request post FIFO. The reply messa

PCI Functional Description 2-9Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.3.1 PCI AddressingThe three physical address space

2-10 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.3.1.3 PCI Memory SpaceThe LSISAS1064 contains two PCI

PCI Functional Description 2-11Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.The following sections describe how the LSISAS1064

2-12 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.3.2.5 Memory Read CommandThe LSISAS1064 uses the Memo

PCI Functional Description 2-13Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.LSISAS1064 by asserting its IDSEL signal when AD[1:

iv PrefaceCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• Appendix A, Register Summary, provides a register map for theLSISAS106

2-14 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.transactions when operating in the PCI-X mode. A split

PCI Functional Description 2-15Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Alignment – The LSISAS1064 uses the calculated line

2-16 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.3.5 PCI InterruptsThe LSISAS1064 signals an interrupt

SAS Functional Description 2-17Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.4 SAS Functional DescriptionThe LSISAS1064 provid

2-18 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 2.3 Narrow and Wide LinksEach phy on the LSISAS1

External Memory Interface 2-19Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 2.4 SSP, STP, and SMP Protocol Usage2.5 Exter

2-20 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.– The LSISAS1064 has no memory requirements in thisconf

External Memory Interface 2-21Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• Uniform sector and/or boot block sector• 64 Kbyte

2-22 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.5.3 NVSRAM ControllerThe LSISAS1064 provides a NVSRAM

Zero Channel RAID 2-23Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 2.6 NVSRAM Block Diagram2.6 Zero Channel RAIDZero cha

Preface vCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Conventions Used in This ManualThe word assert means to drive a signal tr

2-24 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 2.7 ZCR Circuit Diagram for the LSISAS10642.7 Un

Multi-ICE Test Interface 2-25Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• Does not support 5-bit and 6-bit characters• Does n

2-26 Functional DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller 3-1Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Chapter 3Signal

3-2 Signal DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• SAS Interface• Memory Interface• Communication Interface•

Signal Organization 3-3Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Figure 3.1 LSISAS1064 Functional Signal GroupingPSBRAM_CS/N

3-4 Signal DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.2 PCI SignalsThis section describes the PCI signals.3.2.1

PCI Signals 3-5Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.2.3 PCI Interface Control SignalsTable 3.3 describes the PCI inte

3-6 Signal DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.2.6 PCI Interrupt SignalsTable 3.6 describes the PCI inter

Compact PCI Signals 3-7Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.4 Compact PCI SignalsTable 3.8 describes the CompactPCI s

vi PrefaceCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.

3-8 Signal DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.6 Memory Interface SignalsTable 3.10 describes the memory

Communication Signals 3-9Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.7 Communication SignalsTable 3.11 describes the UART an

3-10 Signal DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.8 Configuration and General Purpose SignalsTable 3.12 desc

JTAG and Test Signals 3-11Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.9 JTAG and Test SignalsTable 3.13 describes the test a

3-12 Signal DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.10 Power SignalsTable 3.14 describes the power and ground

Power-On Sense Pins Description 3-13Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.11 Power-On Sense Pins DescriptionThis secti

3-14 Signal DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• MAD[31] NVSRAM or SRAM Installed – Pulling this signal HI

Power-On Sense Pins Description 3-15Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.• MAD[28:17], Reserved.• MAD[16], PCI-X Operat

3-16 Signal DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.3.12 Internal Pull-Ups and Pull-DownsTable 3.16 describes t

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller 4-1Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Chapter 4PCI Ho

LSISAS1064 PCI-X to 4-Port Serial Attached SCSI/SATA Controller viiCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.ContentsChapter

4-2 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Pointer registers and identify the extended capab

PCI Configuration Space Register Description 4-3Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x00–0x01Vendor IDRead On

4-4 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Interrupt Disable 10Clearing this bit enables the

PCI Configuration Space Register Description 4-5Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Enable Memory Space 1This bit contr

4-6 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Received Target Abort (from Master) 12A master de

PCI Configuration Space Register Description 4-7Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.New Capabilities 4The LSISAS1064 PC

4-8 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x0CCache Line SizeRead/WriteCache Line

PCI Configuration Space Register Description 4-9Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x0EHeader TypeRead OnlyH

4-10 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Reserved [1:0]This field is reserved.Register: 0x

PCI Configuration Space Register Description 4-11Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x1C–0x1FMemory [1] LowR

viii ContentsCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.2.4 SAS Functional Description 2-172.5 External Memory Interface 2-19

4-12 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x24–0x27ReservedReserved [31:0]This r

PCI Configuration Space Register Description 4-13Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x2E–0x2FSubsystem IDRea

4-14 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.This four-byte register contains the base addres

PCI Configuration Space Register Description 4-15Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x35–0x37ReservedReserve

4-16 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0x3DInterrupt PinRead OnlyInterrupt Pi

PCI Configuration Space Register Description 4-17Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Max_Lat [7:0]This register specifie

4-18 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.PME_Support [15:11]These bits define the power ma

PCI Configuration Space Register Description 4-19Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.PME_Status 15The PCI function clea

4-20 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXPower Management DataRead OnlyPowe

PCI Configuration Space Register Description 4-21Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXMSI Message ControlR

Contents ixCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.5.4 Pinout 5-125.5 Package Drawings 5-20Appendix A Register SummaryInde

4-22 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Multiple Message Capable [3:1]These read only bi

PCI Configuration Space Register Description 4-23Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXMSI Message Upper Ad

4-24 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXMSI Mask BitsRead/WriteMSI Mask Bi

PCI Configuration Space Register Description 4-25Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXMSI-X Next PointerRe

4-26 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXMSI-X Table OffsetRead OnlyMSI-X T

PCI Configuration Space Register Description 4-27Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXMSI-X PBA OffsetRead

4-28 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXPCI-X Next PointerRead OnlyPCI-X N

PCI Configuration Space Register Description 4-29Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Maximum Memory Read Byte Count [3:

4-30 PCI Host Register DescriptionCopyright © 2003–2005 by LSI Logic Corporation. All rights reserved.Register: 0xXXPCI-X StatusRead/WriteReserved [31

PCI Configuration Space Register Description 4-31Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.0b10 in this field to indicate that